Papers 【 display / non-display 】

Papers 【 display / non-display 】

• Design and fabrication of integrator using adiabatic quantum-flux-parametron circuit

  Shen, HX; Han, ZY; Li, ZY; He, YX; Yoshikawa, N

  SUPERCONDUCTOR SCIENCE & TECHNOLOGY   38 ( 2 )   2025.2

  DOI Web of Science

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  Language：Japanese   Publishing type：Research paper (scientific journal)   Joint Work  

• A binary neural computing unit with programmable gate using SFQ and CMOS hybrid circuit

  Li, ZY; Shen, HX; Yoshikawa, N; Yamanashi, Y

  SUPERCONDUCTOR SCIENCE & TECHNOLOGY   37 ( 6 )   2024.6

  DOI Web of Science

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  Language：Japanese   Publishing type：Research paper (scientific journal)   Joint Work  

• General Matrix Synthesis for Cascaded-Block Filters With Flexible Bandwidth

  He, YX; Zeng, Y; Shen, HX; Yoshikawa, N; Zou, XH; Yan, LS; Macchiarella, G

  IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES   72 ( 6 )   3671 - 3681   2024.6

  DOI Web of Science

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  Language：Japanese   Publishing type：Research paper (scientific journal)   Joint Work  

• A binary neural computing unit with programmable gate using SFQ and CMOS hybrid circuit

  Li Zongyuan, Shen Hongxiang, Yoshikawa Nobuyuki, Yamanashi Yuki

  Superconductor Science and Technology   37 ( 6 )   2024.5

  CiNii Research

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  Language：English   Publishing type：Research paper (scientific journal)   Publisher：IOP Publishing   Joint Work  

  Superconducting neural networks hold significant potential for future applications such as natural language processing and image recognition. To this end, we propose a binary neural computing unit implemented using a hybrid circuit of cryogenic CMOS and superconducting technologies. It offers two main advantages: firstly, we utilize current-mode computations for neural unit weight calculations, significantly reducing the unit's footprint and enabling the potential for higher integration in the future. Secondly, all computations are performed in a low-temperature environment, which implies the possibility of on-chip learning in superconducting neural networks and the potential for achieving faster training rates in the future. We fabricated the chip using Nb 1 kA cm−2 process (1KP) technology and experimentally verified the correctness of the circuit logic. The margins for various control parameters of the circuit are approximately around 30%, and the superconducting circuit power consumption is estimated to be around 4 microwatts.

• Generating Microwave Signals with Enhancive Amplitudes Using Superconductor Single Flux Quantum Pulses for Controlling Quantum Bit

  Shen, HX; He, YX; Han, ZY; Li, ZY; Luo, WH; Cheng, L; Luo, YY; Jing, B; Yoshikawa, N

  ADVANCED QUANTUM TECHNOLOGIES   7 ( 8 )   2024.4

  DOI Web of Science

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  Language：Japanese   Publishing type：Research paper (scientific journal)   Joint Work  

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