HAN Zeyu

Affiliation

Institute for Multidisciplinary Sciences

Job Title

Specially Appointed Assistant Professor


ORCID  https://orcid.org/0000-0003-1150-4776

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Education 【 display / non-display 】

  • 2024.4
    -
    2026.3

    Yokohama National University   Doctor Course   Completed

  • 2022.4
    -
    2024.3

    Yokohama National University   Master Course   Completed

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Degree 【 display / non-display 】

  • Master of Engineering - Yokohama National University

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Campus Career 【 display / non-display 】

  • 2026.4
    　
    　

    Duty   Yokohama National UniversityInstitute for Multidisciplinary Sciences   Specially Appointed Assistant Professor  

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External Career 【 display / non-display 】

  • 2024.4
    -
    2026.3

      Special researcher of the Japan Society for the Promotion of Science  

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Academic Society Affiliations 【 display / non-display 】

  • 2025.9
    　
    　
     

    低温工学・超電導学会

  • 2023.2
    　
    　
     

    電子情報通信学会

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Research Areas 【 display / non-display 】

  • Manufacturing Technology (Mechanical Engineering, Electrical and Electronic Engineering, Chemical Engineering) / Electronic devices and equipment

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Papers 【 display / non-display 】

  • Small-area and high-precision deterministic stochastic adder using single flux quantum circuit

    Han, ZY; Mandai, Y; Yoshikawa, N; Yamanashi, Y

    SUPERCONDUCTOR SCIENCE & TECHNOLOGY   39 ( 1 )   2026.1  [Reviewed]

    DOI Web of Science

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    Authorship：Lead author   Language：English   Publishing type：Research paper (scientific journal)   Joint Work  

  • Reconfigurable in-memory XNOR processing element with external DC control currents for scalable superconducting binary neural networks

    Han, ZY; Shen, HX; Yoshikawa, N; Yamanashi, Y

    SUPERCONDUCTOR SCIENCE & TECHNOLOGY   38 ( 12 )   2025.12  [Reviewed]

    DOI Web of Science

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    Authorship：Lead author   Language：English   Publishing type：Research paper (scientific journal)   Joint Work  

  • High-Capacity DFF Cells for Unary Computing Using Single-Flux Quantum Circuits

    Han, ZY; Yoshikawa, N; Yamanashi, Y

    IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY   35 ( 8 )   2025.11  [Reviewed]

    DOI Web of Science

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    Authorship：Lead author   Language：English   Publishing type：Research paper (scientific journal)   Joint Work  

  • A Finite State Automaton for the Tsetlin Machine Using High-Capacity Resettable D Flip-Flop Cells

    Han, ZY; Yoshikawa, N; Yamanashi, Y

    IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY   36 ( 5 )   2026.8  [Reviewed]

    DOI Web of Science

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    Authorship：Lead author   Language：English   Publishing type：Research paper (scientific journal)   Joint Work  

  • Small-Area Sorting Network Based on Unary Coding Using Single Flux Quantum Circuits

    Han Zeyu, Yoshikawa Nobuyuki, Yamanashi Yuki

    IEEE Transactions on Applied Superconductivity   35 ( 5 )   1 - 5   2025.8  [Reviewed]

    DOI Web of Science CiNii Research

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    Authorship：Lead author   Language：English   Publishing type：Research paper (scientific journal)   Publisher：Institute of Electrical and Electronics Engineers (IEEE)   Joint Work  

    The sorting network is crucial in fields like communication switching, data mining, image processing, neural networks, and others, where the bitonic sorting network (BSN) is an efficient comparison sorting method. It uses the compare-and-swap (CAS) units to compare two input data and decide whether to swap them. The single flux quantum (SFQ) circuits are well known for their high-speed operation and low power consumption, but they are less effective at performing numerical comparisons in CAS units. To address this issue, the unary coding (UC) method, an entropy encoding method that represents the natural number n with n ones followed by zeros, is introduced to implement a smaller SFQ-based BSN. The UC requires only AND and OR gates for CAS unit implementation. Consequently, the 8-input 32-bit UC BSN is two orders of magnitude smaller than the conventional SFQ binary coding BSN with the same precision and achieves approximately 3.3 times better energy efficiency. Additionally, compared to the CMOS-based UC BSN circuit, the energy efficiency improves by 5.8 times, even considering the cooling cost (×400). We also implemented a 4-input BSN circuit, using the 1.0 μm 10-layer Nb SFQ circuit fabrication process, and verified its operation at low speed.

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Awards 【 display / non-display 】

  • 横浜国立大学大学院工学府CREATES論文顕彰表彰

    2024.3   横浜国立大学大学院工学府  

    Individual or group name of awards：韓　澤宇

  • 電子情報通信学会超伝導エレクトロニクス研究会奨励賞

    2024.1   電子情報通信学会  

    Individual or group name of awards：韓　澤宇

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