Papers 【 display / non-display 】

Papers 【 display / non-display 】

• Small-area and high-precision deterministic stochastic adder using single flux quantum circuit

  Han, ZY; Mandai, Y; Yoshikawa, N; Yamanashi, Y

  SUPERCONDUCTOR SCIENCE & TECHNOLOGY   39 ( 1 )   2026.1  [Reviewed]

  DOI Web of Science

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  Authorship：Lead author   Language：English   Publishing type：Research paper (scientific journal)   Joint Work  

• Reconfigurable in-memory XNOR processing element with external DC control currents for scalable superconducting binary neural networks

  Han, ZY; Shen, HX; Yoshikawa, N; Yamanashi, Y

  SUPERCONDUCTOR SCIENCE & TECHNOLOGY   38 ( 12 )   2025.12  [Reviewed]

  DOI Web of Science

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  Authorship：Lead author   Language：English   Publishing type：Research paper (scientific journal)   Joint Work  

• High-Capacity DFF Cells for Unary Computing Using Single-Flux Quantum Circuits

  Han, ZY; Yoshikawa, N; Yamanashi, Y

  IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY   35 ( 8 )   2025.11  [Reviewed]

  DOI Web of Science

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  Authorship：Lead author   Language：English   Publishing type：Research paper (scientific journal)   Joint Work  

• A Finite State Automaton for the Tsetlin Machine Using High-Capacity Resettable D Flip-Flop Cells

  Han, ZY; Yoshikawa, N; Yamanashi, Y

  IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY   36 ( 5 )   2026.8  [Reviewed]

  DOI Web of Science

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  Authorship：Lead author   Language：English   Publishing type：Research paper (scientific journal)   Joint Work  

• A Finite State Automaton for the Tsetlin Machine Using High-Capacity Resettable D Flip-Flop Cells

  Han Zeyu, Yoshikawa Nobuyuki, Yamanashi Yuki

  IEEE Transactions on Applied Superconductivity   36 ( 5 )   1 - 6   2026.1  [Reviewed]

  CiNii Research

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  Authorship：Lead author   Language：English   Publishing type：Research paper (scientific journal)   Publisher：Institute of Electrical and Electronics Engineers   Joint Work  

  Single Flux Quantum (SFQ) circuits provide ultrafast operation and low power consumption, making them attractive candidates for machine learning accelerators. The Tsetlin Machine (TM) is a low-complexity and highly interpretable architecture, organized as a voting system of propositional clauses. In the TM, an ensemble of finite-state automata (FSAs), called Tsetlin automata, independently decides whether to include or exclude specific literals. The chosen literals are assembled into propositional clauses that collectively form the voting system, while each FSA updates its state based on rewards or penalties determined by the prediction outcome. However, existing FSA designs for TM based on SFQ circuits still suffer from either a narrow margin or excessive circuit area. To achieve compact and stable state transitions using SFQ circuits, we designed High-Capacity Resettable D Flip-Flop (HC-RDFF) cells by cascading storage loops. The proposed FSA was implemented using two HC-RDFFs to store the include and exclude states, respectively. The FSA with 16 states requires only 395 Josephson junctions with a static power of approximately 128 W, exhibiting a bias margin of −21% to +25% at low speed and a maximum operating frequency of 20 GHz in simulation. We fabricated the HC-RDFF and the FSA using a 10 kA/cm² Nb four-layer superconducting process and verified their correct operation through low-speed measurements. The number of FSA states can be increased simply by extending the cascaded storage loops in the HC-RDFFs. We expect the proposed FSA to be suitable for constructing stable TM systems based on SFQ circuits with reduced hardware costs.

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Awards 【 display / non-display 】

Awards 【 display / non-display 】

• 横浜国立大学大学院工学府CREATES論文顕彰表彰

  2024.3   横浜国立大学大学院工学府  

  Individual or group name of awards：韓　澤宇

• 電子情報通信学会超伝導エレクトロニクス研究会奨励賞

  2024.1   電子情報通信学会  

  Individual or group name of awards：韓　澤宇

Grant-in-Aid for Scientific Research 【 display / non-display 】

Grant-in-Aid for Scientific Research 【 display / non-display 】

• 時間領域論理の導入による超高速かつ超効率動作が可能な超伝導ニューラルネットワーク

  Grant number：24KJ1148  2024.4 - 2027.3

  日本学術振興会  Grant-in-Aid for JSPS Fellows

  Investigator(s)：韓　澤宇

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  Authorship：Principal investigator 

Presentations 【 display / non-display 】

Presentations 【 display / non-display 】

• 超伝導回路によるリーク速度可変スパイキングニューロンの設計

  韓澤宇, 吉川信行, 山梨裕希

  低温工学・超電導学会研究発表会 

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  Event date： 2026.6

  Language：Japanese   Presentation type：Oral presentation (general)  

• 超伝導ReLU活性化関数回路の最高動作周波数の向上

  上野佑斗, 韓澤宇, 吉川信行, 山梨裕希

  低温工学・超電導学会研究発表会 

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  Event date： 2026.6

  Language：Japanese   Presentation type：Oral presentation (general)  

• 単一磁束量子回路を用いたTsetlinマシン向け有限オートマトンの実装

  韓澤宇, 吉川信行, 山梨裕希

  低温工学・超電導学会研究発表会 

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  Event date： 2025.12

  Language：Japanese   Presentation type：Oral presentation (general)  

• Demonstration of A Small-Area Unary Arithmetic Logic Unit using Single Flux Quantum Circuits

  Z. Han, N. Yoshikawa, and Y. Yamanashi

  38th International Symposium on Superconductivity (ISS2025)  

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  Event date： 2025.12

  Language：English   Presentation type：Oral presentation (general)  

  Venue：Nagasaki, Japan  

• An SFQ-Based Compact and High-Precision Deterministic Adder for Stochastic Computing

  Z. Han, Y. Mandai, N. Yoshikawa, and Y. Yamanashi

  2nd International Workshop on Quantum, Cryogenic and Superconductive Computing (QUEST2025) 

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  Event date： 2025.10

  Language：English   Presentation type：Poster presentation  

  Venue：Yokohama  

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