Affiliation |
Institute of Advanced Sciences |
Job Title |
Specially Appointed Assistant Professor |
Research Fields, Keywords |
RSFQ, AQFP, Superconductor electronics |
Related SDGs |
Education 【 display / non-display 】
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Stellenbosch University Doctor Course Graduated
Degree 【 display / non-display 】
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Doctor of Philosophy - University of Stellenbosch(South Africa)
Campus Career 【 display / non-display 】
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2022.4
Duty Yokohama National UniversityInstitute of Advanced Sciences Specially Appointed Assistant Professor
Research Areas 【 display / non-display 】
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Manufacturing Technology (Mechanical Engineering, Electrical and Electronic Engineering, Chemical Engineering) / Electron device and electronic equipment
Thesis for a degree 【 display / non-display 】
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The development and characterisation of a parameterised RSFQ cell library for layout synthesis
Lieze Schindler
Stellenbosch University 2021.3
Doctoral Thesis Single Work [Reviewed]
Other Link: https://scholar.sun.ac.za/handle/10019.1/109815
Papers 【 display / non-display 】
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Application of Phase-Based Circuit Theory to RSFQ Logic Design
Lieze Schindler; Coenrad J. Fourie
IEEE Transactions on Applied Superconductivity 32 ( 3 ) 2022.4 [Reviewed]
Authorship:Lead author, Corresponding author Language:English Publishing type:Research paper (scientific journal) Publisher:IEEE Single Work
In contrast to transistor-based semiconductor circuits, there is currently no widely accepted formalized circuit theory or design methodology for superconductor rapid single flux quantum (RSFQ) logic circuits. Experienced designers intuitively consider flux loops, nodal phase, and branch currents when making design choices, but the lack of a formalized design process makes it difficult for inexperienced RSFQ circuit designers to construct a functioning logic cell without a reference. This results in new circuit designers, mostly recycling templates from published circuit designs without fully understanding why the circuits function as they do. Inexperienced RSFQ circuit designers often follow an iterative process where cell parameter values are adjusted, and the cell is run through electronic simulation engines until the desired functionality is reached. We propose the development of a formalized circuit design theory for RSFQ logic from first principles using phase-based circuit analysis. The circuit is designed using dc analysis to establish the dc operating point of the circuit. Phase-based analysis and simulation are then used to verify the dynamic circuit functionality. To demonstrate this method, we discuss examples for well-known RSFQ cells. We analyze the initial operating margins of these designs and discuss design accuracy and efficiency. Methods for current regulation to minimize current leakage between cells are discussed. We also present how this design methodology can be used to design new circuits such as an RSFQ XNOR cell. We investigate how an inverting (NOT) cell can be combined with other logic cells to minimize cell latency.
Other Link: https://ieeexplore.ieee.org/document/9681154
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The ColdFlux RSFQ Cell Library for MIT-LL SFQ5ee Fabrication Process
Lieze Schindler; Johannes A. Delport; Coenrad J. Fourie
IEEE Transactions on Applied Superconductivity 32 ( 2 ) 2022.3 [Reviewed]
Authorship:Lead author, Corresponding author Language:English Publishing type:Research paper (scientific journal) Publisher:IEEE Joint Work
The ColdFlux project, within the IARPA SuperTools program, aims to develop an open-source EDA tool suite for superconductor circuits, with focus on Rapid single flux quantum (RSFQ) and Adiabatic quantum-flux-parametron (AQFP) logic. The functionality of the ColdFlux tool suite is validated through the development of ready-to-use cell libraries. The process of establishing the open-source ColdFlux RSFQ cell library is documented, along with the set of EDA tools developed within the project required for each step. This includes the initial cell design using phase-based equations, circuit simulation, operating margin analysis, and cell parameter optimization. The row-based layout architecture for the RSFQ cell library is also presented. Several of the designed RSFQ cells are placed within test circuits and fabricated through the MIT-LL SFQ5ee fabrication process. We present the measured results for these test circuits and discuss design efficiency, potential improvements, and future work.
Other Link: https://ieeexplore.ieee.org/document/9653858
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Adopting a Standard Track Routing Architecture for Next-Generation Hybrid AC/DC-Biased Logic Circuits
L. Schindler, C. L. Ayala, K. Jackman, C. J. Fourie and N. Yoshikawa
IEEE Transactions on Applied Superconductivity 33 ( 5 ) 2023.8 [Reviewed]
Authorship:Lead author, Corresponding author Language:English Publishing type:Research paper (scientific journal) Single Work
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Coenrad Johann Fourie; Christopher Lawrence Ayala; Lieze Schindler; Tomoyuki Tanaka; Nobuyuki Yoshi … Show more authors
Coenrad Johann Fourie; Christopher Lawrence Ayala; Lieze Schindler; Tomoyuki Tanaka; Nobuyuki Yoshikawa Hide authors
IEEE Transactions on Applied Superconductivity 30 ( 6 ) 2020.9 [Reviewed]
Language:English Publishing type:Research paper (scientific journal) Joint Work
Other Link: https://ieeexplore.ieee.org/document/9072514
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Lieze Schindler; Paul le Roux; Coenrad J. Fourie
IEEE Transactions on Applied Superconductivity 30 ( 2 ) 2020.3 [Reviewed]
Authorship:Lead author, Corresponding author Language:English Publishing type:Research paper (scientific journal) Publisher:IEEE Single Work
Devices used for rapid single flux quantum (RSFQ) cell interconnects include passive transmission lines (PTLs) and Josephson transmission lines. In this article, we demonstrate software analysis methods with which reflections on PTLs can be improved through impedance matching without compromising the margins of the connected RSFQ logic cells. RSFQ cells are typically designed to connect to PTL transmitters and receivers before attaching the PTL interconnects. These transmitters and receivers are used as matching and buffer stages between the cell and the PTL; and can be adjusted to minimize impedance mismatching. We integrate PTL transmitters and receivers within the RSFQ cell to decrease the amount of Josephson junctions required to incorporate PTL interconnect functionality. Frequency domain analysis on each cell provides equivalent impedance characteristics used for impedance matching.
Other Link: https://ieeexplore.ieee.org/document/8951137
Presentations 【 display / non-display 】
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Cell design methodology and circuit theory of RSFQ logic
Lieze Schindler
European Conference on Applied Superconductivity (EUCAS) 2019.9
Event date: 2019.9
Language:English Presentation type:Oral presentation (general)
Venue:Glasgow, UK
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Standard cell layout synthesis for row-based placement and routing of RSFQ and AQFP logic families
Lieze Schindler
International Superconductive Electronics Conference (ISEC) 2019.8 IEEE-CSC
Event date: 2019.7 - 2019.8
Language:English Presentation type:Oral presentation (general)
Venue:Riverside, CA, USA
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Moat Design and Analysis for AQFP Circuits
Lieze Schindler
East Asia Symposium on Superconductor Electronics
Event date: 2023.3
Language:English Presentation type:Oral presentation (general)
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Adopting a Standard Track Routing Architecture for Next-Generation Hybrid AC/DC-Biased Logic Circuits
Lieze Schindler
Applied Superconductivity Conference (ASC)
Event date: 2022.10
Language:English Presentation type:Poster presentation
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Adopting a standard track routing architecture for next-generation hybrid ac/dc-biased logic circuits
Lieze Schinder
JSPS 146th Committee International Symposium on Superconductor Electronics
Event date: 2022.9
Language:English Presentation type:Poster presentation